Motorola MPC8260 - Manual (Page 899)

MOTOROLA Chapter 30. Fast Ethernet Controller 30-25
Part IV. Communications Processor Module
Data length is the number of octets the CP writes into this BD data buffer. It is written by
the CP as the buffer is closed. When this BD is the last BD in the frame (RxBD[L] = 1), the
data length contains the total number of frame octets (including four bytes for CRC). Note
that at least as much memory should be allocated for each receive buffer as the size
speciÞed in MRBLR. MRBLR should be divisible by 32 and not less than 64.
The receive buffer pointer, which points to the Þrst location of the associated data buffer,
can reside in internal or external memory. This value must be divisible by 32.
When a received frameÕs data length is an exact multiple of MRBLR, the last BD contains
only the status and total frame length.
Note that at least two BDs must be prepared before beginning reception.
Figure 30-9 shows how RxBDs are used during Ethernet reception.
10 LG Rx frame length violation. A frame length greater than the MFLR (maximum frame length) deÞned for
this FCC is recognized.
11 NO Rx nonoctet aligned frame. A frame that contained a number of bits not divisible by eight is received
and the CRC check at the preceding byte boundary generated an error.
12 SH Short frame. A frame length less than the MINFLR (minimum frame length) deÞned for this channel is
recognized. This indication is possible only if the FPSMR[RSH] = 1.
13 CR Rx CRC error. This frame contains a CRC error.
14 OV Overrun. A receiver overrun occurred during frame reception.
15 CL Collision. This frame is closed because a collision occurred during frame reception. Set only if a late
collision occurs or if FPSMR[RSH] is set. The late collision deÞnition is determined by the setting of
FPSMR[LCW].
Table 30-10. RxBD Field Descriptions (Continued)
Bits Name Description