Motorola MPC8260 - Manual (Page 469)

MOTOROLA Chapter 14. Serial Interface with Time-Slot Assigner 14-15
Part IV. Communications Processor Module
¥ Dynamic routing. A TDMÕs routing deÞnition can be modiÞed while FCCs, MCCs,
SCCs, or SMCs are connected to the TDM. The number of SI
x RAM entries is
determined by the banks the user relates to the corresponding TDM channel and is
divided into four parts (Rx, Rx shadow, Tx, and Tx shadow).
Dynamic changes divide portions of the SI x RAM into current-route and shadow RAM.
Once the current-route RAM is programmed, the TSA and SI channels are enabled, and
TSA operation begins. When a change in routing is required, the shadow RAM must be
programmed with the new route and SI
x CMDR[CSR xn ] must be set. As a result, as soon
as the corresponding sync arrives the SI exchanges the shadow RAM with the current-route
RAM and resets CSR
xn to indicate that the operation is complete. At this time, the user may
change the routing again. Notice that the original current-route RAM is now the shadow
RAM and vice versa. Figure 14-9 shows an example of the shadow RAM exchange process
for two TDM channels both with half of the RAM as a shadow.
If for instance one TDM with dynamic changes is programmed to own all four banks, and
the shadow is programmed to the last two banks, the initial current-route RAM addresses
in the SI
x RAM are as follows.
¥ 0Ð255: TXa route
¥ 1024Ð1279: RXa route
The initial shadow RAMs are at addresses:
¥ 256Ð511: TXa route
¥ 1280Ð1535: RXa route
The user can read any RAM at any time, but for proper SI operation the user must not
attempt to write the current-route RAM. The SI
x status register (SI x STR) can be read to Þnd
out which part of the RAM is the current-route RAM. The user can also externally connect
one of the strobes to an interrupt pin to generate an interrupt on a particular SI
x RAM entry
starting or ending execution by the TSA.
An example is shown in Figure 14-9.