Motorola MPC8260 - Manual (Page 969)

MOTOROLA Chapter 35. Parallel I/O Ports 35-13
Part IV. Communications Processor Module
PB20 FCC2: RxD[6]
UTOPIA 8
FCC2: RxD[1]
MII/HDLC/transp.
nibble
GND TDM_A1-L1TXD[1]
Nibble
TDM_D2: L1RSYNC GND
PB19 FCC2: RxD[5]
UTOPIA 8
FCC2: RxD[2]
MII/HDLC/transp. nibble
GND TDM_D2: L1RQ TDM_A2: L1RXD[3]
Nibble
GND
PB18 FCC2: RxD[4]
UTOPIA 8
FCC2: RxD[3]
MII/HDLC/transp. nibble
GND TDM_D2: L1CLKO TDM A2: L1RXD[2]
Nibble
GND
PB17 TDM_A1: L1RQ FCC3: RX_DV
MII
GND CLK17 GND
PB16 TDM_A1: L1CLKO FCC3: RX_ER
MII
GND CLK18 GND
PB15 FCC3: TX_ER
MII
SCC2: RXD
(primary option)
by
PD28
TDM_C1: L1TXD
Inout
(primary option)
by
PD28
PB14 FCC3: TX_EN
MII
SCC3: RXD
(primary option)
by
PD25
TDM_C1: L1RXD
Inout
(primary option)
by
PD27
PB13 TDM_B1: L1RQ FCC3: COL
MII
GND TDM_A2: L1TXD[1]
Nibble
TDM_C1:
L1TSYNC/GRANT
(primary option)
by
PD16
PB12 TDM_B1: L1CLKO FCC3: CRS
MII
GND SCC2: TXD TDM_C1: L1RSYNC
(primary option)
by
PD26
PB11 FCC2: TxD[0]
UTOPIA 8
FCC3: RxD[3]
MII/HDLC/transp. nibble
GND TDM_D1: L1TXD
Inout
(primary option)
by
PD25
PB10 FCC2: TxD[1]
UTOPIA 8
FCC3: RxD[2]
MII/HDLC/transp. nibble
GND TDM_D1: L1RXD
Inout
(primary option)
by
PD24
PB9 FCC2: TxD[2]
UTOPIA 8
FCC3: RxD[1]
MII/HDLC/transp. nibble
GND TDM_A2: L1TXD[2]
Nibble
TDM_D1:
L1TSYNC/GRANT
(primary option)
by PD4
PB8 FCC2: TxD[3]
UTOPIA 8
FCC3: RxD[0]
MII/HDLC/transp. nibble
FCC3: RxD
HDLC/transp. serial
GND SCC3: TXD TDM_D1: L1RSYNC
(primary option)
by
PD23
Table 35-6. Port B Dedicated Pin Assignment (PPARB = 1) (Continued)
Pin
Pin Function
PSORB = 0 PSORB = 1
PDIRB = 1 (Output) PDIRB = 0 (Input)
Default
Input
PDIRB = 1 (Output)
PDIRB = 0 (Input or
Inout if SpeciÞed)
Default
Input