Motorola MPC8260 - Manual (Page 608)

20-24 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
To receive S-records, the core must wait for an RX interrupt, indicating that a complete S-
record buffer was received. Transmission requires assembling S-records into buffers and
linking them to the TxBD table; transmission can be paused when an XOFF character is
received. This scheme minimizes the number of interrupts the core receives (one per S-
record) and relieves it from continually scanning for control characters.
Table 20-14. UART Control Characters for S-Records Example
Character Description
Line Feed Both the E and R bits should be cleared. When an end-of-line character is received, the current buffer is
closed and made available to the core for processing. This buffer contains an entire S record that the
processor can now check and copy to memory or disk as required.
XOFF E should be cleared; R should be set. Whenever the core receives a control-character-received (CCR)
interrupt and the RCCR contains XOFF, the software should immediately stop transmitting by setting
PSMR[FRZ]. This keeps the other station from losing data when it runs out of Rx buffers.
XON XON should be received after XOFF. E should be cleared and R should be set. PSMR[FRZ] on the
transmitter should now be cleared. The CPM automatically resumes transmission of the serial line at the
point at which it was previously stopped. Like XOFF, the XON character is not stored in the receive buffer.