Motorola MPC8260 - Manual (Page 989)

MOTOROLA Index Index-9
INDEX
FPSMRx, 28-7
FTODRx, 28-7
GFMRx, 28-3
initialization, 28-14
interrupt handling, 28-15
interrupts, 28-13
overview, 28-2
parameter RAM, 28-10
RxBD, 28-8
saving power, 28-21
switching protocols, 28-21
timing control, 28-15
TxBD, 28-8
switching protocols, 28-21
transparent mode
features list, 32-2
receive operation, 32-2
synchronization
achieving, 32-2
example, 32-4
external signals, 32-3
in-line pattern, 32-3
transmit operation, 32-2
FCCE register
ATM, 29-87
Ethernet, 30-21
FCC overview, 28-14
HDLC, 31-14
FCCM register
ATM, 29-87
Ethernet, 30-21
FCC overview, 28-14
HDLC, 31-14
FCCS (FCC status) register, 28-14, 31-16
FCRx (function code registers), 28-13
FDSRx (FCC data synchronization registers), 28-7
Features list
SIU interrupt controller, 4-7
Features lists
communications processor (CP), 13-4
communications processor module (CPM), 13-1
ATM controller, 29-2
parallel I/O ports, 35-1
CPM multiplexing, 15-2
Ethernet mode, 24-3
fast communications controllers (FCCs)
Fast Ethernet, 30-3
HDLC mode, 31-2
transparent mode, 32-2
HDLC bus controller, 21-19
I
2 C controller, 34-2
IDMA emulation, 18-5
implementation-specific, 1-1
memory controller
features list, 10-3
new features supported, 10-2
multi-channel controllers (MCCs), 27-1
processor core, 2-3
RISC timer tables, 13-19
serial communications controllers (SCCs)
AppleTalk mode, 25-2
BISYNC mode, 22-2
general list, 19-2
HDLC mode, 21-2
transparent mode, 23-1
UART mode, 20-2
serial interface, 14-3
serial management controllers (SMCs)
general list, 26-2
transparent mode, 26-21
UART mode, 26-11
UART mode, features not supported, 26-10
serial peripheral interface (SPI), 33-2
timers, 17-2
FPSMR register
Ethernet, 30-20
HDLC, 31-7
protocol-specific mode, 28-7
FTIRRx (FCC transmit internal rate registers), 29-88
FTODRx (FCC transmit-on-demand registers), 28-7
G
GCI
activation and deactivation, 14-33
programming, 14-33
support, 14-31
General-purpose chip-select machine (GPCM)
common features, 10-6
differences between MPC8xx and MPC8260, 10-62
external access termination, 10-60
implementation differences with UPMs
and SDRAM machine, 10-7
interface signals, 10-51
MPC8xx versus MPC8260, 10-62
overview, 10-51
SRAM configuration, 10-51
strobe signal behavior, 10-52
terminating external accesses, 10-60
timing configuration, 10-52
General-purpose signals, 10-76
GFMR (general FCC mode register), 28-3, 29-85
GMODE (global mode entry), 29-41
GPLn (general-purpose signals), 10-76
GSMR (general SCC mode register)
AppleTalk mode, 25-3
HDLC bus protocol, programming, 21-23
overview, 19-3