Motorola MPC8260 - Manual (Page 508)

15-18 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
Table 15-7 describes CMXSMR Þelds.
Bits 0 1 2 3 4 5 6 7
Field SMC1 Ñ SMC1CS SMC2 Ñ SMC2CS
Reset 0000_0000
R/W R/W
Addr 0x11B0C
Figure 15-12. CMX SMC Clock Route Register (CMXSMR)
Table 15-7. CMXSMR Field Descriptions
Name Name Description
0 SMC1 SMC1 connection
0 SMC1 is not connected to the TSA and is either connected directly to the NMSIx pins or is not
used. The choice of general-purpose I/O port pins versus SMCn pins is made in the parallel I/O
control register.
1 SMC1 is connected to the TSA of the SIs. The NMSIx pins are available for other purposes.
1 Ñ Reserved, should be cleared
2Ð3 SMC1CS SMC1 clock source (NMSI mode). SMC1 can take its clocks from one of the two BRGs or one of
two pins from the bank of clocks. However, the SMC1 transmit and receive clocks must be the
same when it is connected to the NMSI.
00 SMC1 transmit and receive clocks are BRG1.
01 SMC1 transmit and receive clocks are BRG7.
10 SMC1 transmit and receive clocks are CLK7.
11 SMC1 transmit and receive clocks are CLK9.
4 SMC2 SMC2 connection
0 SMC2 is not connected to the TSA and is either connected directly to the NMSIx pins or is not
used. The choice of general-purpose I/O port pins versus SMCn pins is made in the parallel I/O
control register.
1 SMC2 is connected to the TSA of the SIs. The NMSIx pins are available for other purposes.
5 Ñ Reserved, should be cleared
6Ð7 SMC2CS SMC2 clock source (NMSI mode). SMC2 can take its clocks from one of the eight BRGs or one of
eight pins from the bank of clocks. However, the SMC2 transmit and receive clocks must be the
same when it is connected to the NMSI.
00 SMC2 transmit and receive clocks are BRG2.
01 SMC2 transmit and receive clocks are BRG8.
10 SMC2 transmit and receive clocks are CLK19.
11 SMC2 transmit and receive clocks are CLK20.