Motorola MPC8260 - Manual (Page 61)

MOTOROLA About This Book lxi
Acronyms and Abbreviations
Table i contains acronyms and abbreviations used in this document. Note that the meanings
for some acronyms (such as SDR1 and DSISR) are historical, and the words for which an
acronym stands may not be intuitively obvious.
Table i. Acronyms and Abbreviated Terms
Term Meaning
A/D Analog-to-digital
ALU Arithmetic logic unit
ATM Asynchronous transfer mode
BD Buffer descriptor
BIST Built-in self test
BPU Branch processing unit
BRI Basic rate interface.
BUID Bus unit ID
CAM Content-addressable memory
CEPT Conference des administrations Europeanes des Postes et Telecommunications (European
Conference of Postal and Telecommunications Administrations).
CMX CPM multiplexing logic
CPM Communication processor module
CR Condition register
CRC Cyclic redundancy check
CTR Count register
DABR Data address breakpoint register
DAR Data address register
DEC Decrementer register
DMA Direct memory access
DPLL Digital phase-locked loop
DRAM Dynamic random access memory
DSISR Register used for determining the source of a DSI exception
DTLB Data translation lookaside buffer
EA Effective address
EEST Enhanced Ethernet serial transceiver
EPROM Erasable programmable read-only memory
FPR Floating-point register
FPSCR Floating-point status and control register