Motorola MPC8260 - Manual (Page 215)

MOTOROLA Chapter 7. 60x Signals 7-1
Chapter 7
60x Signals
70
70
This chapter describes the MPC8260 PowerPC processorÕs external signals. It contains a
concise description of individual signals, showing behavior when a signal is asserted and
negated, when the signal is an input and an output, and the differences in how signals work
in external-master or internal-only conÞgurations.
NOTE
A bar over a signal name indicates that the signal is active lowÐ
for example, ARTRY (address retry) and TS (transfer start).
Active-low signals are referred to as asserted (active) when
they are low and negated when they are high. Signals that are
not active-low, such as TSIZ[0Ð3] (transfer size signals) and
TT[0Ð4] (transfer type signals) are referred to as asserted when
they are high and negated when they are low.
The 60x bus signals used with MPC8260 are grouped as follows:
¥ Address arbitration signalsÑIn external arbiter mode, MPC8260 uses these signals
to arbitrate for address bus mastership. The MPC8260 arbiter uses these signals to
enable an external device to arbitrate for address bus mastership.
¥ Address transfer start signalsÑThese signals indicate that a bus master has begun a
transaction on the address bus.
¥ Address transfer signals (address bus)ÑThese signals are used to transfer the
address.
¥ Transfer attribute signalsÑThese signals provide information about the type of
transfer, such as the transfer size and whether the transaction is single, single
extended, bursted, write-through or cache-inhibited.
¥ Address transfer termination signalsÑThese signals are used to acknowledge the
end of the address phase of the transaction. They also indicate whether a condition
exists that requires the address phase to be repeated.
¥ Data arbitration signalsÑThe MPC8260, in external arbiter mode, uses these
signals to arbitrate for data bus mastership. The MPC8260 arbiter uses these signals
to enable an external device to arbitrate for data bus mastership.