Motorola MPC8260 - Manual (Page 720)

26-24 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
Figure 26-12. Synchronization with the TSA
Once SMCMR[REN] is set, the Þrst time-slot after the frame sync causes the SMC receiver
to achieve synchronization. Data is received immediately, but only during deÞned receive
time slots. The receiver continues receiving data during its deÞned time slots until REN is
cleared. If an
ENTER HUNT MODE command is issued, the receiver loses synchronization,
closes the buffer, and resynchronizes to the Þrst time slot after the frame sync.
Once SMCMR[TEN] is set, the SMC waits for the transmit FIFO to be loaded before trying
to achieve synchronization. When the transmit FIFO is loaded, synchronization and
transmission begins depending on the following:
¥ If a buffer is made ready when the SMC2 is enabled, the Þrst byte is placed in time
slot 1 if CLSN is 8 and to slot 2 if CLSN is 16.
¥ If a buffer has its SMC enabled, then the Þrst byte in the next buffer can appear in
any time slot associated with this channel.
¥ If a buffer is ended with the L bit set, then the next buffer can appear in any time slot
associated with this channel.
If the SMC runs out of transmit buffers and a new buffer is provided later, idles are sent in
the gap between buffers. Data transmission from the later buffer begins at the start of an
SMC time slot, but not necessarily the Þrst time slot after the frame sync. So, to maintain a
certain bit alignment beginning with the Þrst time slot, make sure that at least one TxBD is
TDM Tx CLK
TDM Tx SYNC
TDM Tx
After TEN If SMC runs out of Tx buffers and new ones
are provided later, transmission begins at is set,
transmission
begins here.
the beginning of either time slot.
SMC1 SMC1
TDM Rx CLK
TDM Rx SYNC
TDM Rx
After REN is set or after
ENTER HUNT MODE command,
reception begins here.
SMC1 SMC1