2 spi transmit bd (txbd), Spi transmit bd (txbd) -15, Spi txbd -15 – Motorola MPC8260 User Manual

Page 939: Spi txbd status and control field descriptions -15

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MOTOROLA

Chapter 33. Serial Peripheral Interface (SPI)

33-15

Part IV. Communications Processor Module

33.7.1.2 SPI Transmit BD (TxBD)

Data to be sent with the SPI is sent to the CP by arranging it in buffers referenced by TxBDs
in the TxBD table. TxBD Þelds should be prepared before data is sent. The format of an
TxBD is shown in Figure 33-12.

Table 33-9 describes the TxBD status and control Þelds.

4

L

Last. Updated by the SPI when the buffer is closed because SPISEL was negated (slave mode only).
Otherwise, RxBD[ME] is set. The SPI updates L after received data is placed in the buffer.
0 This buffer does not contain the last character of the message.
1 This buffer contains the last character of the message.

5

Ñ

Reserved, should be cleared.

6

CM

Continuous mode. Master mode only; in slave mode, CM should be cleared.
0 Normal operation.
1 The CP does not clear RxBD[E] after this BD is closed; the buffer is overwritten when the CP next

accesses this BD. This allows continuous reception from an SPI slave into one buffer for autoscanning
of a serial A/D peripheral with no core overhead.

7Р13 С

Reserved, should be cleared.

14

OV

Overrun. Set when a receiver overrun occurs during reception (slave mode only). The SPI updates OV
after the received data is placed in the buffer.

15

ME

Multimaster error. Set when this buffer is closed because SPISEL was asserted when the SPI was in
master mode. Indicates a synchronization problem between multiple masters on the SPI bus. The SPI
updates ME after the received data is placed in the buffer.

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

Offset + 0

R

Ñ

W

I

L

Ñ

CM

Ñ

UN

ME

Offset + 2

Data Length

Offset + 4

Tx Buffer Pointer

Offset + 6

Figure 33-12. SPI TxBD

Table 33-9. SPI TxBD Status and Control Field Descriptions

Bits

Name

Description

0

R

Ready.
0 The buffer is not ready to be sent. This BD or its buffer can be modiÞed. The CP clears R (unless

RxBD[CM] is set) after the buffer is sent (unless RxBD[CM] is set) or an error occurs.

1 The buffer is ready for transmission or is being sent. The BD cannot be modiÞed once R is set.

1

Ñ

Reserved, should be cleared.

Table 33-8. SPI RxBD Status and Control Field Descriptions (Continued)

Bits

Name

Description

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