Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 114)

Mentor VIP AE AXI3/4 User Guide, V10.2b 96
SystemVerilog AXI3 and AXI4 Slave BFMs
get_write_data_cycle()
September 2013
get_write_data_cycle()
This blocking AXI4 task waits for a single write data cycle for which the WVALID signal is
asserted. It will block for one ACLK period.
AXI3 BFM
Note
The get_write_data_cycle() task is not available in the AXI3 BFM.
AXI4 Example
// Wait for a single write data cycle
bfm.get_write_data_cycle();
Prototype task automatic get_write_data_cycle();
Arguments None
Returns None