Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 72)

Mentor VIP AE AXI3/4 User Guide, V10.2b 54
SystemVerilog AXI3 and AXI4 Master BFMs
execute_write_data_phase()
September 2013
execute_write_data_phase()
This task executes a write data phase (beat) previously created by the
create_write_transaction() task. This phase can be blocking (default) or nonblocking, defined
by the transaction record operation_mode field.
The execute_write_data_phase() sets the WVALID protocol signal at the appropriate time
defined by the transaction record data_valid_delay field and sets the data_beat_done array
index element field to 1 when the phase completes.
AXI3 Example
// Declare a local variable to hold the transaction record.
axi_transaction write_trans;
// Create a write transaction with start address of 0 and assign
// it to the local write_trans variable.
write_trans = bfm.create_write_transaction(0);
....
// Execute the write data phase for the first beat of the
// write_trans transaction.
bfm.execute_write_data_phase(write_trans, 0, last);
// Execute the write data phase for the second beat of the
// write_trans transaction.
bfm.execute_write_data_phase(write_trans, 1, last);
Prototype // * = axi | axi4
task automatic execute_write_data_phase
(
*_transaction trans,
int index = 0, // Optional
output bit last
);
Arguments trans The *_transaction record.
index Data phase (beat) number.
last Flag to indicate that this phase is the last beat of data.
Returns None