Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 662)

Mentor VIP AE AXI3/4 User Guide, V10.2b 642
VHDL Tutorials
Verifying a Master DUT
September 2013
Note
In addition to the above variables and procedures, you can configure other aspects of the
AXI4 Slave BFM by using the procedures:
“set_config()” on page 352 and
“get_config()” on page 354.
Using the AXI4 Basic Slave Test Program API
There are a set of variables and procedures that you can use to create stimulus scenarios based
on a memory-model slave with a minimal amount of editing, as described in the
AXI4 Basic
Slave API Definition section.
Consider the following configuration when using the slave test program.
•
slave_mode - The read and write channel interaction can cause simultaneous read and
write transactions to occur at the same address. With the default slave_mode setting the
read transaction data burst is buffered at the start of the burst and the write data burst is
buffered at the end of the burst. This can result in the read data being stale at the time it
is transmitted over the protocol signals. If this is an undesirable feature, then set the
slave_mode to be AXI4_PHASE_SLAVE.
•
m_max_outstanding_read_trans - The maximum number of outstanding (incomplete)
read transactions that can be initiated by a master test program before the slave test
program applies back-pressure to the master by deasserting the ARREADY signal. When
subsequent read transactions complete, then the slave test program asserts ARREADY.
•
m_max_outstanding_write_trans - The maximum number of outstanding (incomplete)
write transactions that can be initiated by a master test program before the slave test
program applies back-pressure to the master by deasserting the AWREADY signal. When
subsequent read transactions complete, then the slave test program asserts AWREADY.