Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual

Page 726

Advertising
background image

Mentor VIP AE AXI3/4 User Guide, V10.2b

706

SystemVerilog AXI3 and AXI4 Test Programs
SystemVerilog AXI3 Slave BFM Test Program

September 2013

// Task : process_read
// This method keep receiving read address phase

// and calls another method to

// process received transaction.
task process_read;
forever
begin
axi_transaction read_trans;

read_trans = bfm.create_slave_transaction();
set_read_address_ready_delay(read_trans);
bfm.get_read_addr_phase(read_trans);

fork
begin
automatic axi_transaction t = read_trans;
handle_read(t);
end
join_none
#0;
end
endtask

// Task : handle_read
// This method reads data from memory and sends read data/response

// either at

// burst or phase level depending upon slave working mode.
task automatic handle_read(input axi_transaction read_trans);
addr_t addr[];
bit [7:0] mem_data[];

set_read_data_valid_delay(read_trans);

for(int i = 0; bfm.get_read_addr(read_trans, i, addr); i++)
begin
mem_data = new[addr.size()];
for (int j = 0; j < addr.size(); j++)
mem_data[j] = do_byte_read(addr[j]);

bfm.set_read_data(read_trans, i, addr, mem_data);

if (slave_mode == AXI_PHASE_SLAVE)
bfm.execute_read_data_phase(read_trans, i);
end

if (slave_mode == AXI_TRANSACTION_SLAVE)
bfm.execute_read_data_burst(read_trans);
endtask

Advertising