Example 11-37. handle_read, Example 11-37 – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual

Page 666

Advertising
background image

Mentor VIP AE AXI3/4 User Guide, V10.2b

646

VHDL Tutorials
Verifying a Master DUT

September 2013

If the

slave_mode

configuration is set to the default of AXI4_TRANSACTION_SLAVE then the

burst_length loop continues until the read data has been set for the whole burst. Otherwise the
individual read data phase is executed over the protocol signals by calling the

execute_read_data_phase()

.

After the burst_length loop is complete,

execute_read_data_burst()

is called for the default

configuration of slave_mode and the read burst is executed over the protocol signals.

The loop completes and restarts by waiting for another transaction_id to be placed into the
queue.

Example 11-37. handle_read

-- handle_read : read data and response through path 4
-- This process reads data from memory and send read data/response either
-- at burst or phase level depending upon slave working mode.
process

variable read_trans: integer;
variable burst_length : integer;
variable byte_length : integer;
variable addr : std_logic_vector(AXI4_MAX_BIT_SIZE-1 downto 0);
variable data : std_logic_vector(7 downto 0);

begin

loop

pop_transaction_id(read_trans, AXI4_QUEUE_ID_1, index, AXI4_PATH_4,

axi4_tr_if_4(index));

set_read_data_valid_delay(read_trans, AXI4_PATH_4,

axi4_tr_if_4(index));

get_burst_length(burst_length, read_trans, index, AXI4_PATH_4,

axi4_tr_if_4(index));

for i in 0 to burst_length loop

get_read_addr(read_trans, i, 0, byte_length, addr, index,

AXI4_PATH_4, axi4_tr_if_4(index));

do_byte_read(addr, data);
set_read_data(read_trans, i, 0, byte_length, addr, data, index,

AXI4_PATH_4, axi4_tr_if_4(index));

if byte_length > 1 then

for j in 1 to byte_length-1 loop

get_read_addr(read_trans, i, j, byte_length, addr, index,

AXI4_PATH_4, axi4_tr_if_4(index));

do_byte_read(addr, data);
set_read_data(read_trans, i, j, byte_length, addr, data,

index, AXI4_PATH_4, axi4_tr_if_4(index));

end loop;

end if;
if slave_mode = AXI4_PHASE_SLAVE then

execute_read_data_phase(read_trans, i, index, AXI4_PATH_4,

axi4_tr_if_4(index));

end if;

end loop;
if slave_mode = AXI4_TRANSACTION_SLAVE then

execute_read_data_burst(read_trans, index, AXI4_PATH_4,

axi4_tr_if_4(index));

end if;

Advertising