Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 255)

VHDL AXI3 and AXI4 Master BFMs
set_cache()
Mentor VIP AE AXI3/4 User Guide, V10.2b 237
September 2013
set_cache()
This nonblocking procedure sets the cache field for a transaction that is uniquely identified by
the transaction_id field previously created by either the
create_write_transaction() or
create_read_transaction() procedure.
Prototype -- * = axi| axi4
-- ** = AXI | AXI4
set_cache
(
cache: in integer;
transaction_id : in integer;
bfm_id : in integer;
path_id : in *_path_t; --optional
signal tr_if : inout *_vhd_if_struct_t
);
Arguments cache (AXI3) Burst cache:
AXI_NONCACHE_NONBUF; (default)
AXI_BUF_ONLY;
AXI_CACHE_NOALLOC;
AXI_CACHE_BUF_NOALLOC;
AXI_CACHE_RSVD0;
AXI_CACHE_RSVD1;
AXI_CACHE_WTHROUGH_ALLOC_R_ONLY;
AXI_CACHE_WBACK_ALLOC_R_ONLY;
AXI_CACHE_RSVD2;
AXI_CACHE_RSVD3;
AXI_CACHE_WTHROUGH_ALLOC_W_ONLY;
AXI_CACHE_WBACK_ALLOC_W_ONLY;
AXI_CACHE_RSVD4;
AXI_CACHE_RSVD5;
AXI_CACHE_WTHROUGH_ALLOC_RW;
AXI_CACHE_WBACK_ALLOC_RW;
(AXI4) Burst cache:
AXI4_NONMODIFIABLE_NONBUF; (default)
AXI4_BUF_ONLY;
AXI4_CACHE_NOALLOC;
AXI4_CACHE_2;
AXI4_CACHE_3;
AXI4_CACHE_RSVD4;
AXI4_CACHE_RSVD5;
AXI4_CACHE_6;
AXI4_CACHE_7;
AXI4_CACHE_RSVD8;
AXI4_CACHE_RSVD9;
AXI4_CACHE_10;
AXI4_CACHE_11;
AXI4_CACHE_RSVD12;
AXI4_CACHE_RSVD12;
AXI4_CACHE_14;
AXI4_CACHE_15;
transaction_id Transaction identifier. Refer to “Overloaded Procedure Common
Arguments” on page 203 for more details.
bfm_id BFM identifier. Refer to “Overloaded Procedure Common Arguments”
on page 203 for more details.