Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 731)

SystemVerilog AXI3 and AXI4 Test Programs
SystemVerilog AXI4 Master BFM Test Program
Mentor VIP AE AXI3/4 User Guide, V10.2b 711
September 2013
// By default it will run in Blocking mode
bfm.execute_transaction(trans);
// Write data value 2 on byte lane 2 to address 2.
trans = bfm.create_write_transaction(2);
trans.set_data_words(32'h0002_0000, 0);
trans.set_write_strobes(4'b0100, 0);
trans.set_write_data_mode(AXI4_DATA_WITH_ADDRESS);
$display ( "@ %t, master_test_program: Writing data (2) to address
(2)", $time);
bfm.execute_transaction(trans);
// Write data value 3 on byte lane 3 to address 3.
trans = bfm.create_write_transaction(3);
trans.set_data_words(32'h0300_0000, 0);
trans.set_write_strobes(4'b1000, 0);
$display ( "@ %t, master_test_program: Writing data (3) to address
(3)", $time);
bfm.execute_transaction(trans);
// Write data value 4 to address 4 on byte lane 0.
trans = bfm.create_write_transaction(4);
trans.set_data_words(32'h0000_0004, 0);
trans.set_write_strobes(4'b0001, 0);
trans.set_write_data_mode(AXI4_DATA_WITH_ADDRESS);
$display ( "@ %t, master_test_program: Writing data (4) to address
(4)", $time);
bfm.execute_transaction(trans);
// 4 x Reads
// Read data from address 1.
trans = bfm.create_read_transaction(1);
trans.set_size(AXI4_BYTES_1);
trans.set_id(1);
bfm.execute_transaction(trans);
if (trans.get_data_words(0) == 32'h0000_0100)
$display ( "@ %t, master_test_program: Read correct data (1) at
address (1)", $time);
else
$display ( "@ %t master_test_program: Error: Expected data (1) at
address 1, but got %d", $time, trans.get_data_words(0));
// Read data from address 2.
trans = bfm.create_read_transaction(2);
trans.set_size(AXI4_BYTES_1);
trans.set_id(2);