Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 453)

VHDL AXI3 and AXI4 Slave BFMs
set_write_response_ready_delay()
Mentor VIP AE AXI3/4 User Guide, V10.2b 433
September 2013
set_write_response_ready_delay()
This AXI3 nonblocking procedure sets the write_response_ready_delay field for a transaction
that is uniquely identified by the transaction_id field previously created by the
create_slave_transaction() procedure.
Note
You do not normally use this procedure in a slave test program.
Prototype set_write_response_ready_delay
(
write_response_ready_delay: in integer;
transaction_id : in integer;
bfm_id : in integer;
path_id : in axi_path_t; --optional
signal tr_if : inout axi_vhd_if_struct_t
);
Arguments write_response_ready_delay Write data channel BREADY delay measured in ACLK
cycles for this transaction. Default: 0.
transaction_id Transaction identifier. Refer to “Overloaded Procedure
Common Arguments” on page 203 for more details.
bfm_id BFM identifier. Refer to “Overloaded Procedure Common
Arguments” on page 203 for more details.
path_id (Optional) Parallel process path identifier:
AXI_PATH_0
AXI_PATH_1
AXI_PATH_2
AXI_PATH_3
AXI_PATH_4
Refer to “Overloaded Procedure Common Arguments” on
page 203 for more details.
tr_if Transaction signal interface. Refer to “Overloaded
Procedure Common Arguments” on page 203 for more
details.
Returns None