Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual

Page 742

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Mentor VIP AE AXI3/4 User Guide, V10.2b

722

SystemVerilog AXI3 and AXI4 Test Programs
SystemVerilog AXI4 Slave BFM Test Program

September 2013

function void set_wr_resp_valid_delay(axi4_transaction trans);
trans.set_write_response_valid_delay(2);
endfunction

// Function : set_read_data_valid_delay
// This is used to set read response phase valid delays to start driving
// read data/response phases after specified delay.
function void set_read_data_valid_delay(axi4_transaction trans);
for (int i = 0; i < trans.data_valid_delay.size(); i++)
trans.set_data_valid_delay(i, 10);
endfunction

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