Set_write_response_valid_delay() – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual
Page 449
VHDL AXI3 and AXI4 Slave BFMs
set_write_response_valid_delay()
Mentor VIP AE AXI3/4 User Guide, V10.2b
429
September 2013
set_write_response_valid_delay()
This nonblocking procedure sets the write_response_valid_delay field for a transaction that is
uniquely identified by the transaction_id field previously created by the
Prototype
set_write_response_valid_delay
(
write_response_valid_delay: in integer;
transaction_id : in integer;
bfm_id : in integer;
path_id : in *_path_t; --optional
signal tr_if : inout *_vhd_if_struct_t
);
Arguments
write_response_valid_delay
Write data channel BVALID delay measured in ACLK
cycles for this transaction. Default: 0.
transaction_id
Transaction identifier. Refer to
on page 203 for more details.
bfm_id
BFM identifier. Refer to
on page 203 for more details.
path_id
(Optional) Parallel process path identifier:
**_PATH_0
**_PATH_1
**_PATH_2
**_PATH_3
**_PATH_4
Refer to
“Overloaded Procedure Common Arguments”
page 203 for more details.
tr_if
Transaction signal interface. Refer to
on page 203 for more
details.
Returns
None