Axi4 assertion configuration, Systemverilog master api, On page 678 – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual

Page 57

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SystemVerilog AXI3 and AXI4 Master BFMs

SystemVerilog Master API

Mentor VIP AE AXI3/4 User Guide, V10.2b

39

September 2013

AXI4 Assertion Configuration

By default, all built-in assertions are enabled in the master AXI4 BFM. To globally disable
them in the master BFM, use the

set_config()

command as the following example illustrates:

set_config(AXI4_CONFIG_ENABLE_ALL_ASSERTIONS,0)

Alternatively, individual built-in assertions can be disabled by using a sequence of

get_config()

and

set_config()

commands on the respective assertion. For example, to disable assertion

checking for the AWLOCK signal changing between the AWVALID and AWREADY handshake
signals, use the following sequence of commands:

// Define a local bit vector to hold the value of the assertion bit vector
bit [255:0] config_assert_bitvector;

// Get the current value of the assertion bit vector
config_assert_bitvector = bfm.get_config(AXI4_CONFIG_ENABLE_ASSERTION);

// Assign the AXI4_LOCK_CHANGED_BEFORE_AWREADY assertion bit to 0
config_assert_bitvector[AXI4_LOCK_CHANGED_BEFORE_AWREADY] = 0;

// Set the new value of the assertion bit vector
bfm.set_config(AXI4_CONFIG_ENABLE_ASSERTION, config_assert_bitvector);

Note

Do not confuse the AXI4_CONFIG_ENABLE_ASSERTION bit vector with the
AXI4_CONFIG_ENABLE_ALL_ASSERTIONS global enable/disable.

To re-enable the AXI4_LOCK_CHANGED_BEFORE_AWREADY assertion, follow the above
code sequence and assign the assertion in the AXI4_CONFIG_ENABLE_ASSERTION bit vector
to 1.

Note

For a complete listing of AXI4 assertions, refer to

“AXI4 Assertions”

on page 678

.

SystemVerilog Master API

This section describes the SystemVerilog master API.

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