Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 760)

Mentor VIP AE AXI3/4 User Guide, V10.2b 740
VHDL AXI3 and AXI4 Test Programs
VHDL AXI3 Master BFM Test Program
September 2013
for i in 0 to burst_length loop
get_write_addr_data(write_trans, i, 0, byte_length, addr, data,
index, AXI_PATH_1, axi_tr_if_1(index));
do_byte_write(addr, data);
if byte_length > 1 then
for j in 1 to byte_length-1 loop
get_write_addr_data(write_trans, i, j, byte_length, addr,
data, index, AXI_PATH_1, axi_tr_if_1(index));
do_byte_write(addr, data);
end loop;
end if;
end loop;
else
last := 0;
loop_i := 0;
while(last = 0) loop
get_write_data_phase(write_trans, loop_i, last, index,
AXI_PATH_1, axi_tr_if_1(index));
get_write_addr_data(write_trans, loop_i, 0, byte_length, addr,
data, index, AXI_PATH_1, axi_tr_if_1(index));
do_byte_write(addr, data);
if byte_length > 1 then
for j in 1 to byte_length-1 loop
get_write_addr_data(write_trans, loop_i, j, byte_length,
addr, data, index, AXI_PATH_1, axi_tr_if_1(index));
do_byte_write(addr, data);
end loop;
end if;
loop_i := loop_i + 1;
end loop;
end if;
push_transaction_id(write_trans, AXI_QUEUE_ID_2, index, AXI_PATH_1,
axi_tr_if_1(index));
end loop;
wait;
end process;
-- handle_response : write response phase through path 2
-- This method sends the write response phase
process
variable write_trans: integer;
begin
loop
pop_transaction_id(write_trans, AXI_QUEUE_ID_2, index, AXI_PATH_2,
axi_tr_if_2(index));
set_wr_resp_valid_delay(write_trans, AXI_PATH_2,
axi_tr_if_2(index));
execute_write_response_phase(write_trans, index, AXI_PATH_2,
axi_tr_if_2(index));
end loop;
wait;
end process;
-- process_read : read address phase through path 3
-- This process keep receiving read address phase and push the
transaction into queue through
-- push_transaction_id API.
process