Figure 6-8. slave test program advanced api tasks, In the slave test program, as shown in, Figure 6-8 – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual

Page 193: There are

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SystemVerilog Tutorials

Verifying a Master DUT

Mentor VIP AE AXI3/4 User Guide, V10.2b

175

September 2013

handle_write_data_ready()

tasks to handle the handshake AWREADY, ARREADY and

WREADY signals, respectively.

The Advanced Slave API is capable of handling pipelined transactions. Pipelining can occur
when a transaction starts before a previous transaction has completed. Therefore, a write
transaction that starts before a previous write transaction has completed can be pipelined.

Figure 6-8

shows the write channel with three concurrent write_trans transactions, whereby the

get_write_addr_phase[2], get_write_data_burst[1] and execute_write_response_phase[0] are
concurrently active on the write address, data and response channels, respectively.

Similarly, a read transaction that starts before a previous read transaction has completed can be
pipelined.

Figure 6-8

shows the read channel with two concurrent read_trans transactions,

whereby the get_read_addr_phase[1] and execute_read_data_burst[0] are concurrently active
on the read address and data channels, respectively.

Figure 6-8. Slave Test Program Advanced API Tasks

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