Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 720)

Mentor VIP AE AXI3/4 User Guide, V10.2b 700
SystemVerilog AXI3 and AXI4 Test Programs
SystemVerilog AXI3 Master BFM Test Program
September 2013
fork
bfm.execute_write_addr_phase(trans2);
bfm.execute_write_data_burst(trans2);
join_any
// Write data value to address 32.
trans3 = bfm.create_write_transaction(32,4);
trans3.set_data_words('hACE0ACE1, 0);
trans3.set_data_words('hACE2ACE3, 1);
trans3.set_data_words('hACE4ACE5, 2);
trans3.set_data_words('hACE6ACE7, 3);
trans3.set_data_words('hACE8ACE9, 4);
for(int i=0; i<5; i++)
trans3.set_write_strobes(4'b1111, i);
$display ( "@ %t, master_test_program: Writing data (3) to address
(32)", $time);
fork
bfm.execute_write_addr_phase(trans3);
bfm.execute_write_data_burst(trans3);
join_any
// Write data value to address 64.
trans4 = bfm.create_write_transaction(64,5);
trans4.set_data_words('hACE0ACE1, 0);
trans4.set_data_words('hACE2ACE3, 1);
trans4.set_data_words('hACE4ACE5, 2);
trans4.set_data_words('hACE6ACE7, 3);
trans4.set_data_words('hACE8ACE9, 4);
trans4.set_data_words('hACEAACEB, 5);
for(int i=0; i<6; i++)
trans4.set_write_strobes(4'b1111, i);
$display ( "@ %t, master_test_program: Writing data (4) to address
(64)", $time);
fork
bfm.execute_write_addr_phase(trans4);
bfm.execute_write_data_burst(trans4);
join_any
repeat(50)
bfm.wait_on(AXI_CLOCK_POSEDGE);
// 4 x Reads
// Read data from address 0.
trans5 = bfm.create_read_transaction(0,3);
trans5.set_id(1);
bfm.execute_transaction(trans5);
if (trans5.get_data_words(0) == 'hACE0ACE1)
$display ( "@ %t, master_test_program: Read correct data (hACE0ACE1)
at address (0)", $time);
else
$display ( "@ %t, master_test_program: Error: Expected data
(hACE0ACE1) at address (0), but got %h", $time, trans5.get_data_words(0));