Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 219)

VHDL API Overview
Operational Transaction Fields
Mentor VIP AE AXI3/4 User Guide, V10.2b 201
September 2013
and the slave BFM holds the delay configuration for the *VALID signals that it asserts. The
Table 7-3 below specifies which *_valid_delay fields are configured by the master and slave
BFMs.
Note
In the transaction record the data channel handshake signal transaction field
(data_valid_delay[]) is defined as and array so that the *VALID delay can be configured
on a per data phase (beat) basis in a transaction.
AXI4 BFM *READY Handshake Signal Delay Transaction Fields
The transaction record contains a *_ready_delay transaction field for each of the five protocol
channels to store the delay value between the assertion of the *VALID and *READY handshake
signals for the channel.
Table 7-4 below specifies the *_ready_delay field corresponding to the
*READY signal delay.
Table 7-3. Master and Slave *valid_delay Configuration Fields
Signal Operational Transaction Field Configuration BFM
AWVALID address_valid_delay Master
WVALID data_valid_delay Master
BVALID write_response_valid_delay Slave
ARVALID address_valid_delay Master
RVALID data_valid_delay Slave
Table 7-4. Master and Slave *_ready_delay Fields
Signal Operational Transaction Field
AWREADY address_ready_delay
WREADY data_ready_delay
BREADY write_response_ready_delay
ARREADY address_ready_delay
RREADY data_ready_delay