Cirrus Logic EP93xx User Manual

Page 104

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DS785UM1

Copyright 2007 Cirrus Logic

MaverickCrunch Co-Processor
EP93xx User’s Guide

3

3

3

Convert Single Precision Floating Point to 32-bit Integer

Description:

Converts a single precision floating point number to a 32-bit integer.

Mnemonic:

CFCVTS32<cond> CRd, CRn

Bit Definitions:

CRd: Destination

register

CRn: Source

register

Convert Double Precision Floating Point to 32-bit Integer

Description:

Converts a double precision floating point number to a 32-bit integer.

Mnemonic:

CFCVTD32<cond> CRd, CRn

Bit Definitions:

CRd: Destination

register

CRn: Source

register

Truncate Single Precision Floating Point to 32-bit Integer

Description:

Truncates a single precision floating point number to a 32-bit integer.

Mnemonic:

CFTRUNCS32<cond> CRd, CRn

Bit Definitions:

CRd: Destination

register.

CRn: Source

register.

Truncate Double Precision Floating Point to 32-bit Integer

Description:

Truncates a double precision floating point number to a 32-bit integer.

Mnemonic:

CFTRUNCD32<cond> CRd, CRn

31:28

27:24

23:22

21:20

19:16

15:12

11:8

7:5

4

3:0

cond

1 1 1 0

0 0

0 1

CRn

CRd

0 1 0 1

1 0 0

0

CRm

31:28

27:24

23:22

21:20

19:16

15:12

11:8

7:5

4

3:0

cond

1 1 1 0

0 0

0 1

CRn

CRd

0 1 0 1

1 0 1

0

CRm

31:28

27:24

23:22

21:20

19:16

15:12

11:8

7:5

4

3:0

cond

1 1 1 0

0 0

0 1

CRn

CRd

0 1 0 1

1 1 0

0

CRm

31:28

27:24

23:22

21:20

19:16

15:12

11:8

7:5

4

3:0

cond

1 1 1 0

0 0

0 1

CRn

CRd

0 1 0 1

1 1 1

0

CRm

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