Blockmask, Transpattrn, Rsvd : reserved - unknown during read – Cirrus Logic EP93xx User Manual
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DS785UM1
Copyright 2007 Cirrus Logic
Graphics Accelerator
EP93xx User’s Guide
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8
8
TRANSPATTRN
Address:
0x8004_0028 - Read/Write
Default:
0x0000_0000
Mask:
0x00FF_FFFF
Definition:
Block Function Transparency Pattern Register
Bit Descriptions:
RSVD:
Reserved - Unknown during read
PATRN:
Transparent Bit Pattern - Read/Write
The value in this field specifies a transparent bit pattern.
Transparent pixel transfers are not written. The
transparent pixel definition is located in the least
significant BPP part of the field for modes less than
24 bpp. Bits 0-23 are used for 24 bpp mode, bits 0-15 are
used for 16 bpp mode, bits 0-7 are used for 8 bpp mode,
and bits 0-3 are used for 4 bpp mode.
BLOCKMASK
Address:
0x8004_002C - Read/Write
Default:
0x0000_0000
Mask:
0x00FF_FFFF
Definition:
Block Mask Register
Bit Descriptions:
RSVD:
Reserved - Unknown during read
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
PATRN
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PATRN
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
MASK
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MASK