Cirrus Logic EP93xx - Manual (Page 726)

23-14 DS785UM1
Copyright 2007 Cirrus Logic
Synchronous Serial Port
EP93xx User’s Guide
2
3
2
3
23
SCR: Serial clock rate. The value SCR is used to generate the
transmit and receive bit rate of the SSP. SCR is a value
from 0 to 255. This provides the secondary divide of
(1+SCR) after a pre divide of CPSDVSR (ranging from 2 to
254)
SPH: SCLKOUT phase (applicable to Motorola SPI frame format
only).
SPO: SCLKOUT polarity (applicable to Motorola SPI frame
format only).
FRF: Frame format:
00 Motorola SPI frame format
01 - TI synchronous serial frame format
10 - National Semiconductor Microwire frame format
11 - Reserved, undefined operation
DSS: Data Size Select:
0000 - Reserved, undefined operation
0001 - Reserved, undefined operation
0010 - Reserved, undefined operation
0011 - 4-bit data
0100 - 5-bit data
0101 - 6-bit data
0110 - 7-bit data
0111 - 8-bit data
1000 - 9-bit data
1001 - 10-bit data
1010 - 11-bit data
1011 - 12-bit data
1100 - 13-bit data
1101 - 14-bit data
1110 - 15-bit data
1111 - 16-bit data
SSPCR1
Address:
0x808A_0004 - Read/Write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD SOD MS SSE LBM RORIE TIE RIE