Cirrus Logic EP93xx User Manual
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DS785UM1
Copyright 2007 Cirrus Logic
AC’97 Controller
EP93xx User’s Guide
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next available frame in SLOT1. As both the AC97S1Data and AC97S2Data
data are required for writes to the external codec, the AC97S2Data data will
only become valid for transmission when the AC97S1Data has been written
also. In order to perform a write to the external codec, the AC97S1Data
register must be written to after the AC97S2Data register is written.
Bit[19] of Slot1 on SDATAOUT from the AC’97 indicates whether a read or a
write is being performed to or from the external codec. This bit is generated
automatically in the AC’97 as follows:
•
When data is written to the AC97S2Data register, the read / write bit is set to “0”
•
The read / write bit is set to “1” when the slot 2 data has been transmitted
•
The read / write bit is set to “1” when a read occurs from either the AC97S1Data or
AC97S2Data register
If a power down is required, then the software must write the address 0x26 to
this location (for the external device), which will be recorded by the controller.
If the AC97S2Data bit 12 is set, then the controller will go into power down
mode.
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
DATA:
Read operation: Read data value of the last value written
to this register via the AC-Link interface. The data
contained within it is the last valid received slot 1, for
example, the slot 0 received tagged slot1 as valid.
Write operation: Write data value to transmit on slot1 on
the next available frame. Once the data has been
transmitted, it will be marked as invalid.
AC97S2Data
Address:
0x8088_0084 - Read/Write
Definition:
Slot 2 Data Register. The AC97S2Data register is a read / write register. When
a write has occurred to this register, the data contained within it will be sent on
the next available frame in SLOT2. In order to perform a write to the external
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26
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RSVD
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DATA