Cirrus Logic EP93xx - Manual (Page 551)

DS785UM1 14-29
Copyright 2007 Cirrus Logic
UART1 With HDLC and Modem Control Signals
EP93xx User’s Guide
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RILEN: Receive Information Lost Interrupt Enable.
0 - RIL interrupt will not occur.
1 - RIL interrupt will occur whenever RIL bit is set.
RFLEN: Receive Frame Lost Interrupt Enable.
0 - RFL interrupt will not occur.
1 - RFL interrupt will occur whenever RFL bit is set.
RTOEN: Receiver Time Out Interrupt Enable.
0 - RTO interrupt will not occur.
1 - RTO interrupt will occur whenever RTO bit is set.
FLAG: Minimum number of opening and closing flags for HDLC
TX. The minimum number of flags between packets is this
4-bit value plus one. Hence, 0000b forces at least one
opening flag and one closing flag for each packet, and
1111b forces at least 16 opening and closing flags. The
closing flags of one packet may also be the opening flags
of the next one if the transmit line does not go idle in
between. Note that HDLC RX does not count flags; only
one is necessary (or three in Manchester mode).
CRCN: CRC polarity control.
0 - CRC transmitted not inverted.
1 - CRC transmitted inverted.
CRCApd: CRC pass through.
0 - Do not pass received CRC to CPU.
1 - Pass received CRC to CPU.
IDLE: Idle mode.
0 - Idle-in Mark mode - When HDLC is idle (not
transmitting starting/stop flags or packets), hold the
transmit data pin high.
1 - Idle-in Flag mode - When HDLC is idle, transmit
continuous flags.
AME: Address Match Enable. Activates address matching on
received frames.
00 - No address matching
01 - 4 x 1 byte matching
10 - 2 x 2 byte matching
11 - Undefined, no matching
IDLSpc: Idle in space
0 - TX idle in mark (normal)
1 - TX idle in space
RX will receive Manchester encoded data whether it idles
in mark or space.