Gryscllutr, Gryscllutg, Gryscllutb – Cirrus Logic EP93xx User Manual
Page 255
DS785UM1
7-73
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
7
7
When EN = ‘0’ and the 2-bit cursor pixel fetched from
SDRAM is ‘10’,
cursor image.
When EN = ‘0’ and the 2-bit cursor pixel fetched from
SDRAM is ‘11’,
cursor image.
RATE:
Rate - Read/Write
When EN = ‘1’, the Rate value written to this field specifies
the number of video frames that will occur before switching
between CursorColor1 or CursorColor2, and
CursorBlinkColor1 or CursorBlinkColor2, respectively.
An on/off cursor blink cycle is controlled by the equation:
Blink Cycle =
2 x (1/VCLK) x HClkTotal.Total x
VLinesTotal.Total x (255 - RATE)
LUT Registers
GrySclLUTR,
GrySclLUTG,
GrySclLUTB
Address:
GrySclLUTR - 0x8003_0080 through 0x8003_00FC
GrySclLUTG - 0x8003_0280 through 0x8003_02FC
GrySclLUTB - 0x8003_0300 through 0x8003_037C
Default:
0x0000_FFFF in offset locations 0x7, 0x15, 0x23, and 0x31
0x0000_0000 in all other locations
Definition: Grayscale Look-Up-Tables
Bit Descriptions:
RSVD:
Reserved - Unknown during read
FRAME:
Frame Counter Selection - Read/Write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
FRAME
VERT
HORZ
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
D