Cirrus Logic EP93xx - Manual (Page 383)

DS785UM1 9-81
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
Soft Reset:
Unchanged
Definition:
Transmit Descriptor Queue Current Length register. The Transmit Descriptor
Queue Current Length defines the number of bytes between the Transmit
Descriptor Current Address and the end of the transmit descriptor queue. This
value is used internally to wrap the pointer back to the start of the queue. The
register should not normally be written.
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
TDCL: Transmit Descriptor Current Length.
TXDQCurAdd
Address:
0x8001_00B8 - Read/Write
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
Definition:
Transmit Descriptor Queue Current Address register. The Transmit Descriptor
Queue Current Address contains the pointer to the next memory location to be
read from the transmit descriptor queue. This should be set at initialization
time to the required starting point in the descriptor queue. During operation,
the MAC will update this address following successful descriptor reads.
Intermediate values in this register will not necessarily align to descriptor
boundaries, nor directly effect the current descriptor in use because several
descriptors may be buffered inside the MAC.
Bit Descriptions:
TDCA: Transmit Descriptor Current Address.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
TDCA
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TDCA