Cirrus Logic EP93xx User Manual
Page 678

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DS785UM1
Copyright 2007 Cirrus Logic
I
2
S Controller
EP93xx User’s Guide
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I2SRX2Rt
Address:
0x8082_0054 - Read Only
Default:
0x0000_0000
Definition:
Receive right data word for channel 2.
Bit Descriptions:
i2s_rx2_right:
Receive right data word for channel 2.
I2SRXLinCtrlData
Address:
0x8082_0058 - Read/Write
Default:
0x0000_0000
Definition:
Receive Line Control Data Register
Bit Descriptions:
RSVD:
Reserved. Unknown During Read. Must be written as “0”.
Left_Right_Justify: Receiver Data word Justification when being received on
the SDI line input.
0 - Left justification.
1 - Right justification.
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i2s_rx2_right
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0
i2s_rx2_right
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RSVD
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0
RSVD
Left_Right_Justify
RXDIR