Txcollcnt, Rxmisscnt, Transmit collision count register – Cirrus Logic EP93xx User Manual
Page 357
DS785UM1
9-55
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
TXCollCnt
Address:
0x8001_0070 - Read Only
Chip Reset:
0x0000_0000
Soft Reset:
0x0000_0000
Definition:
Transmit Collision Count Register
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
TXC:
Transmit Collision Count. The transmit collision count
records the total number of collisions experienced on the
transmit interface, including late collisions. When the most
significant bit of the count is set, an optional interrupt may
be generated. The register is cleared automatically
following a read and writing to the register will have no
effect.
RXMissCnt
Address:
0x8001_0074 - Read Only
Chip Reset:
0x0000_0000
Soft Reset:
0x0000_0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TXC
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RMC