Cirrus Logic EP93xx User Manual
Page 110
3-40
DS785UM1
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
3
3
3
Double Precision Floating Point Add
Description:
Adds two double precision floating point numbers.
Mnemonic:
CFADDD<cond> CRd, CRn, CRm
Bit Definitions:
CRd: Destination
register
CRn: Addend
register
CRm: Addend
register
Single Precision Floating Point Subtract
Description:
Subtracts two single precision floating point numbers:
CRd = CRn - CRm
Mnemonic:
CFSUBS<cond> CRd, CRn, CRm
Bit Definitions:
CRd: Destination
register
CRn: Minuend
register
CRm: Subtrahend
register
Double Precision Floating Point Subtract
Description:
Subtracts two double precision floating point numbers.
Mnemonic:
CFSUBD<cond> CRd, CRn, CRm
Bit Definitions:
CRd: Destination
register
CRn: Minuend
register
CRm: Subtrahend
register
31:28
27:24
23:22
21:20
19:16
15:12
11:8
7:5
4
3:0
cond
1 1 1 0
0 0
1 1
CRn
CRd
0 1 0 0
1 0 1
0
CRm
31:28
27:24
23:22
21:20
19:16
15:12
11:8
7:5
4
3:0
cond
1 1 1 0
0 0
1 1
CRn
CRd
0 1 0 0
1 1 0
0
CRm
31:28
27:24
23:22
21:20
19:16
15:12
11:8
7:5
4
3:0
cond
1 1 1 0
0 0
1 1
CRn
CRd
0 1 0 0
1 1 1
0
CRm