Cirrus Logic EP93xx - Manual (Page 82)

3-12 DS785UM1
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
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SAT[1:0]: Accumulator saturation mode select. These bits are set to
select the saturation mode or to disable saturation for
accumulator operations:
0X = Saturation disabled for accumulator operations
10 = Accumulator saturation enabled, bit formats 1.63 and
1.31
11 = Accumulator saturation enabled, bit format 2.62
FCC[1:0]: FCC flags out of comparator:
00 = Operand A equals operand B
01 = Operand A less than operand B
10 = Operand A greater than operand B
11 = Operands are unordered (at least one is NaN)
V: Overflow Flag. Indicates the overflow status of the
previous integer operation:
0 = No overflow
1 = Overflow
FWDEN: Forwarding Enable. This bit determines whether data path
writeback results are forwarded to the data path operand
fetch stage and to the STC/MRC execute stage. When
pipeline interlocks occur due to dependencies of data
path, STC, and MRC instruction source operands on data
path results, setting this bit will improve instruction
throughput:
0 = Forwarding not enabled
1 = Forwarding enabled
Invalid: 0 = No invalid operations detected
1 = An invalid operation was performed
Denorm: 0 = No denormalized numbers have been supplied as
instruction operands
1 = A denormalized number has been supplied as an
instruction operand
RM[1:0]: Rounding Mode. Selects IEEE 754 rounding mode:
0 0 = Round to nearest
0 1 = Round toward 0
1 0 = Round to
-
∞
1 1 = Round to +
∞
IXE: Inexact Trap Enable. Enables/disables software trapping
for IEEE 754 inexact exceptions:
0 = Disable software trapping for inexact exceptions
1 = Enable software trapping for inexact exceptions