Scrnlines, Linelength, Regis – Cirrus Logic EP93xx User Manual
Page 229: Rsvd : reserved. unknown during read
DS785UM1
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Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
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Video Screen Half-page Starting SDRAM Address -
Read/Write
If DSCAN = ‘1’ in the
register, the Video Screen
Half-page Starting SDRAM Address value written to this
field corresponds to the upper left corner of the bottom half
of the video screen.
NA:
Not Assigned. Will return written value during a read.
ScrnLines
Address: 0x8003_0030
Default: 0x0000_0000
Definition: Video Screen Lines Register
Bit Descriptions:
RSVD:
Reserved - Unknown during read
LINES:
Lines - Read/Write
The Lines value written to this field specifies the number of
lines to be scanned to the display during normal and half-
page mode operation.
LineLength
Address: 0x8003_0034
Default: 0x0000_0000
Definition: Video Line Length Register
Bit Descriptions:
RSVD:
Reserved. Unknown during read.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
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6
5
4
3
2
1
0
RSVD
LINES
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
LEN