Cirrus Logic EP93xx - Manual (Page 3)

DS785UM1
©
Copyright 2007 Cirrus Logic, Inc. iii
EP93xx User’s Guide
Contents
Chapter Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv
Chapter Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvii
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxii
Preface................................................................................................................... P-1
P.1 About the EP93xx User’s Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P-1
P.2 Related Documents from Cirrus Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P-3
P.3 Reference Documents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P-3
P.4 Notational Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P-3
P.5 Register Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P-4
Chapter 1. Introduction ......................................................................................... 1-1
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
1.2 EP93xx Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
1.3 EP93xx Processor Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7
1.4 EP93xx Processor Highlights . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7
1.4.1 High-Performance ARM920T Core .................................................................................1-7
1.4.2 MaverickCrunch
™
Co-processor for Ultra-Fast Math Processing....................................1-7
1.4.3 MaverickKey
™
Unique ID Secures Digital Content in OEM Designs ..............................1-8
1.4.4 Integrated Multi-Port USB 2.0 Full Speed Hosts with Transceivers ................................1-8
1.4.5 Integrated Ethernet MAC Reduces BOM Costs ..............................................................1-9
1.4.6 8x8 Keypad Interface Reduces BOM Costs ....................................................................1-9
1.4.7 Multiple Booting Mechanisms Increase Flexibility ...........................................................1-9
1.4.8 Abundant General Purpose I/Os Build Flexible Systems ................................................1-9
1.4.9 General-Purpose Memory Interface (SDRAM, SRAM, ROM, FLASH) ...........................1-9
1.4.10 12-Bit Analog-to-Digital Converter (ADC) Provides an Integrated
Touch-Screen Interface or General ADC Functionality ..........................................................1-10
1.4.11 Raster Analog / LCD Controller ...................................................................................1-10
1.4.12 Graphics Accelerator ...................................................................................................1-10
1.4.13 PCMCIA Interface........................................................................................................1-10
Chapter 2. ARM920T Core and Advanced High-Speed Bus (AHB)................... 2-1
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.2 Overview: ARM920T Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.2.1 Features ..........................................................................................................................2-1
2.2.2 Block Diagram .................................................................................................................2-2
2.2.3 Operations .......................................................................................................................2-2
2.2.3.1 ARM9TDMI Core ...........................................................................................2-3
2.2.3.2 Memory Management Unit ............................................................................2-4
2.2.3.3 Cache and Write Buffer .................................................................................2-5
2.2.4 Co-processor Interface ....................................................................................................2-6
2.2.5 AMBA AHB Bus Interface Overview................................................................................2-6
2.2.6 AHB Implementation Details............................................................................................2-7
2.2.7 Memory and Bus Access Errors ......................................................................................2-9
2.2.8 Bus Arbitration .................................................................................................................2-9
2.2.8.1 Main AHB Bus Arbiter..................................................................................2-10
2.2.8.2 SDRAM Slave Arbiter ..................................................................................2-11
2.2.8.3 EBI Bus Arbiter ............................................................................................2-11
2.3 AHB Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-11
2.3.1 AHB Slave .....................................................................................................................2-11