Cirrus Logic EP93xx - Manual (Page 388)

9-86 DS785UM1
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
RDST: Receive Data Soft Threshold. The hard and soft threshold
work in exactly the same manner except one. The soft
threshold will not cause a bus request to be made if the
bus is currently in use, but only when it is deemed to be
idle (no transfers for four AHB clocks). The hard threshold
takes effect immediately, regardless of the state of the bus.
This operation allows for more efficient use of the AHB bus
by allowing smaller transfers to take place when the bus is
lightly loaded and requesting larger transfers only when
the bus is more heavily loaded.
TXBufThrshld
Address:
0x8001_00D4 - Read/Write
Suggested Value:
0020_0010
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
Definition:
Transmit Buffer Threshold register. The transmit buffer thresholds are used to
set a limit on the amount of empty space allowed in the transmit FIFO before a
bus request will be scheduled. When the number of empty words in the FIFO
exceeds the threshold value, the Descriptor Processor will schedule a bus
request to transfer data. The actual posting of the bus request may be delayed
due to lack of resources in the MAC, such as no active transmit descriptor.
The lower two bits of the thresholds are always zero.
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
TDHT: Transmit Data Hard Threshold.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD TDHT 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD TDST 0 0