Cirrus Logic EP93xx - Manual (Page 596)

16-20 DS785UM1
Copyright 2007 Cirrus Logic
UART3 With HDLC Encoder
EP93xx User’s Guide
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TAB: Transmitted Frame Aborted. (Read/Write)
Set “1” when a transmitted frame is terminated with an
abort. Cleared by writing to a “1” to this bit.
TFC: Transmit Frame Complete. (Read/Write)
Set to “1” whenever a transmitted frame completes,
whether terminated normally or aborted. Cleared by
writing to a “1” to this bit.
TFS: Transmit FIFO Service request. (Read Only)
This bit is a copy of the TIS bit in the UART interrupt
identification register.
0 - TX FIFO is full or TX disabled.
1 - TX FIFO not full and TX enabled. May generate an
interrupt and signal a DMA service request.