Txstsqcurlen, Txstsqcuradd, Unchanged – Cirrus Logic EP93xx User Manual
Page 386
9-84
DS785UM1
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
TXStsQCurLen
Address:
0x8001_00C6 - Read/Write. Note half word alignment.
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
Definition:
Transmit Status Queue Current Length. The Transmit Status Queue Current
Length defines the number of bytes between the Transmit Status Current
Address and the end of the transmit status queue. This value is used internally
to wrap the pointer back to the start of the queue. The register should not
normally be written.
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
TSQCL:
Transmit Status Queue Current Length.
TXStsQCurAdd
Address:
0x8001_00C8 - Read/Write
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TSQCL
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSQCA
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TSQCA