Rtcload, Rtcctrl – Cirrus Logic EP93xx User Manual
Page 654
Advertising

20-6
DS785UM1
Copyright 2007 Cirrus Logic
Real Time Clock With Software Trim
EP93xx User’s Guide
2
0
2
0
20
RTCLoad
Address:
0x8092_000C - Read/Write
Default:
0x0000_0000
Definition:
RTC Load Register. Contains the 32 bit load value. Data written to this register
is transferred to the RTCData on the next 1 Hz tick.
Bit Descriptions:
RTCLR:
Load value.
RTCCtrl
Address:
0x8092_0010 - Read/Write
Default:
0x0000_0000
Definition:
RTC Interrupt Control Register. Contains the interrupt enable control bit.
Bit Descriptions:
RSVD:
Reserved, unknown during read.
MIE:
Match Interrupt Enable,
1 - RTC match interrupt is enabled
0 - interrupt disabled.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RTCLR
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RTCLR
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
MIE
Advertising