Figure 12-1 – Cirrus Logic EP93xx User Manual
Page 481
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DS785UM1
12-3
Copyright 2007 Cirrus Logic
Static Memory Controller
EP93xx User’s Guide
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Figure 12-1. 32-bit Read, 32-bit Memory, 0 Wait Cycles, RBLE = 1, WAITn Inactive
Figure 12-2. 32-bit Write, 32-bit Memory, 0 Wait Cycles, RBLE = 1, WAITn Inactive
AD[x]
DA[x]
RDn/OEn
nCSx
HCLK
Data Read
AD[x]
DA[x]
WRn and nDMQ[3:0]
nCSx
HCLK
Data Write
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