Cirrus Logic EP93xx User Manual
Page 544
14-22
DS785UM1
Copyright 2007 Cirrus Logic
UART1 With HDLC and Modem Control Signals
EP93xx User’s Guide
1
4
1
4
14
UART1Ctrl
Address:
0x808C_0014 - Read/Write
Default:
0x0000_0000
Definition:
UART1 Control Register
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
LBE:
Loopback Enable. If this bit is set to 1, data sent to TXD is
received on RXD. This bit is cleared to 0 on reset, which
disables the loopback mode.
RTIE:
Receive Timeout Enable. If this bit is set to 1, the receive
timeout interrupt is enabled.
TIE:
Transmit Interrupt Enable. If this bit is set to 1, the transmit
interrupt is enabled.
RIE:
Receive Interrupt Enable. If this bit is set to 1, the receive
interrupt is enabled.
MSIE:
Modem Status Interrupt Enable. If this bit is set to 1, the
modem status interrupt is enabled.
UARTE:
UART Enable. If this bit is set to 1, the UART is enabled.
Data transmission and reception occurs for UART signals.
UART1Flag
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
LBE
RTIE
TIE
RIE
MSIE
RSVD
UARTE
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
TXFE
RXFF
TXFF
RXFE
BUSY
DCD
DSR
CTS