Cirrus Logic EP93xx - Manual (Page 92)

3-22 DS785UM1
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
3
3
3
Bit Definitions:
N: Floating point precision - 0 for single, 1 for double.
Rn: Base register in ARM
CRd: Destination register.
Loading Integer Value from Memory
Description:
Loads a 32- or 64-bit integer from memory into a MaverickCrunch register.
Bit Definitions:
N: Integer width - 0 for 32-bit integer, 1 for 64-bit integer
Rn: Base register in ARM
CRd: Destination register.
Store Floating Point Values to Memory
Description:
Stores a single or double precision floating point value from a MaverickCrunch
register into memory.
31:28 27:25 24 23 22 21 20 19:16 15:12 11:8 7:0
cond 1 1 0 P U N W 1 Rn CRd 0 1 0 1 8_bit_word_offset
Table 3-12. Mnemonic Codes for Loading Integer Value from Memory
Mnemonic Addressing Mode N
CFLDR32<cond> CRd, [Rn, <offset>]{!} Immediate pre-indexed 0
CFLDR32<cond> CRd, [Rn], <offset> Immediate post-indexed 0
CFLDR64<cond> CRd, [Rn, <offset>]{!} Immediate pre-indexed 1
CFLDR64<cond> CRd, [Rn], <offset> Immediate post-indexed 1
31:28 27:25 24 23 22 21 20 19:16 15:12 11:8 7:0
cond 1 1 0 P U N W 0 Rn CRd 0 1 0 0 8_bit_word_offset