Cirrus Logic EP93xx User Manual
Page 633
DS785UM1
17-37
Copyright 2007 Cirrus Logic
IrDA
EP93xx User’s Guide
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1
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RFC:
RFC mask bit. When high, the FIR RFC status can
generate an interrupt.
RFS:
RFS mask bit. When high, the FIR RFS status can
generate an interrupt.
TAB:
TAB mask bit. When high, the FIR TAB status can
generate an interrupt.
TFC:
TFC mask bit. When high, the FIR TFC status can
generate an interrupt.
TFS:
TFS mask bit. When high, the FIR TFS status can
generate an interrupt.
FIIR
Address:
0x808B_0188 - Read Only
Default:
0x0000_0000
Definition:
FIR Interrupt Register. An interrupt is signalled from this block if any bit is high
in the FIIR.
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
RFL:
Logical AND of FIR RFL status bit and RFL mask bit.
RIL:
Logical AND of FIR RIL status bit and RIL mask bit.
RFC:
Logical AND of FIR RFC status bit and RFC mask bit.
RFS:
Logical AND of FIR RFS status bit and RFS mask bit.
TAB:
Logical AND of FIR TAB status bit and TAB mask bit.
TFC:
Logical AND of FIR TFC status bit and TFC mask bit.
TFS:
Logical AND of FIR TFS status bit and TFS mask bit.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
RFL
RIL
RFC
RFS
TAB
TFC
TFS