Cirrus Logic EP93xx User Manual
Page 72
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DS785UM1
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
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3
3
•
IEEE-754 single precision floating point (24-bit signed significand and 8-bit biased
exponent)
•
IEEE-754 double precision floating point (53-bit signed significand and 11-bit biased
exponent)
•
32-bit integer
•
64-bit integer
The co-processor performs the following standard operations on all four supported data
formats:
•
addition
•
subtraction
•
multiplication
•
absolute value
•
negation
•
logical left/right shift
•
comparison
In addition, for 32-bit integers, the co-processor provides:
•
multiply-accumulate (MAC)
•
multiply-subtract (MSB)
Any of the four data formats may be converted to another of the formats. All four data types
may be loaded directly from and stored directly to memory via the ARM920T co-processor
interface. They may also be moved to or from ARM920T registers.
The MaverickCrunch co-processor also provides a 72-bit extended precision integer format
that is used only in the accumulators. The accumulators may also be used in MAC and MSB
operations.
IEEE-754 rounding and exceptions are also provided. Four rounding modes for floating point
operations are:
•
round to nearest
•
round toward
+
∞
•
round toward
-
∞
•
round toward 0
Exceptions include:
•
Invalid operator
•
Overflow
•
Underflow