2 internal register memory map – Freescale Semiconductor MPC5200B User Manual
Page 121
MPC5200B Users Guide, Rev. 1
3-2
Freescale Semiconductor
Internal Register Memory Map
3.2
Internal Register Memory Map
Table 3-1. Internal Register Memory Map
Address
Name
Description
Reference
MBAR + 0x0000
MM
Memory Map Registers
MBAR + 0x0100
SDRAM
SDRAM Memory Controller registers.
MBAR + 0x0200
CDM
Clock Distribution Module registers.
MBAR + 0x0300
CSC
Chip Select Controller registers.
MBAR + 0x0500
ICTL
Interrupt Controller registers.
MBAR + 0x0600
GPT
General Purpose Timer registers.
MBAR + 0x0700
SLT
Slice Time registers.
MBAR + 0x0800
RTC
Real-Time Clock registers.
MBAR + 0x0900
CAN
MSCAN registers.
Section 19.5.2
MBAR + 0x0B00
GPS
GPIO Standard registers
MBAR + 0x0C00
GPW
GPIO Wake up registers.
MBAR + 0x0D00
PCI
PCI XLB Configuration registers
MBAR + 0x0F00
SPI
Serial Peripheral Interface registers.
MBAR + 0x1000
USB
Universal Serial Bus registers.
MBAR + 0x1200
BDMA
BestComm DMA registers.
MBAR + 0x1300
BDLC
J1850 (BDLC) registers
MBAR + 0x1F00
XLARB
XL BUS ARBITRATION Registers
MBAR + 0x2000
PSC1
Programmable Serial Controller 1 registers.
MBAR + 0x2200
PSC2
Programmable Serial Controller 2 registers.
MBAR + 0x2400
PSC3
Programmable Serial Controller 3 registers.
MBAR + 0x2600
PSC4
Programmable Serial Controller 4 registers.
MBAR + 0x2800
PSC5
Programmable Serial Controller 5 registers.
MBAR + 0x2C00
PSC6
Programmable Serial Controller 6 / Infra-Red Data
Association registers.
MBAR + 0x3000
ETH
Ethernet registers.
MBAR + 0x3800
BPCI
BestComm DMA PCI registers.
MBAR + 0x3A00
ATA
Advanced Technology Attachment registers.
Section 11.3.1
Section 11.3.2
Section 11.3.3
MBAR + 0x3C00
BLPC
BestComm DMA LocalPlus registers
MBAR + 0x3D00
I
2
C
Inter-Integrated Circuit registers.
MBAR + 0x8000
SRAM
On-chip Static RAM memory locations.