10 gpw wakeup gpio status register-mbar + 0x0c24, Gpw wakeup gpio status register – Freescale Semiconductor MPC5200B User Manual
Page 213
MPC5200B Users Guide, Rev. 1
7-54
Freescale Semiconductor
General Purpose I/O (GPIO)
7.3.2.2.10
GPW WakeUp GPIO Status Register—MBAR + 0x0C24
Table 7-46. GPW WakeUp GPIO Status Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Istat
Reserved
W
rwc
rwc
rwc
rwc
rwc
rwc
rwc
rwc
RESET:
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Reserved
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:7
Istat
Interrupt status bits for GPIO WakeUp pins 7–0.
1 indicates an interrupt occurred. Cleared with a sticky-bit write to a 1 to clear the interrupt
condition.
Bit 0 reflects interrupt on GPIO_WKUP_7 (GPIO_WKUP_7 pin)
Bit 1 reflects interrupt on GPIO_WKUP_6 (GPIO_WKUP_6 pin)
Bit 2 reflects interrupt on GPIO_WKUP_5 (PSC6_1 pin)
Bit 3 reflects interrupt on GPIO_WKUP_4 (PSC6_0 pin)
Bit 4 reflects interrupt on GPIO_WKUP_3 (ETH_17 pin)
Bit 5 reflects interrupt on GPIO_WKUP_2 (PSC3_9 pin)
Bit 6 reflects interrupt on GPIO_WKUP_1 (PSC2_4 pin)
Bit 7 reflects interrupt on GPIO_WKUP_0 (PSC1_4 pin)
8:31
—
Reserved