Freescale Semiconductor MPC5200B - Manual (Page 299)

MPC5200B Users Guide, Rev. 1
10-2 Freescale Semiconductor
PCI External Signals
10.1.2 Block Diagram
Figure 10-1. PCI Block Diagram
10.2 PCI External Signals
Table 10-1. PCI External Signals
Signal I/O Definition
AD[31:0] I/O Multiplexed Address and Data Bus (Shared with ATA and LPC). AD31 is the most
significant bit while AD0 is the least significant as per the PCI specification. The entire
PCI external bus is little Endian ordered.
PCI_CBE[3:0] I/O Command/Bytes Enables
PCI_DEVSEL I/O Device Select
PCI_FRAME I/O Frame
PCI_IDSEL I Initialization Device Select
PCI_IRDY I/O Initiator Ready
PCI_PAR I/O Parity
PCI_CLK O PCI Clock
PCI_PERR I/O Parity Error
PCI_RST O PCI Reset
PCI_SERR I/O System Error
PCI_STOP I/O Stop
PCI_TRDY I/O Target Ready
External
PCI bus
PCI
Arbiter
Config
External REQ/GNT
CommBus
PCI
Controller
Req/Gnt
Config
Interface
Target
Interface
Initiator
Interface
Slave bu
s
XL bus
Master
bus/ Com-
mBus
Initiator
Master bus
Target
PCI Controller Block